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An Optically Gated Transistor Composed of Amorphous M + Ge2Se3 (M = Cu or Sn) for Accessing and Continuously Programming a Memristor
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An Optically Gated Transistor Composed of Amorphous M + Ge2Se3 (M = Cu or Sn) for Accessing and Continuously Programming a Memristor
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  • Kristy A. Campbell*
    Kristy A. Campbell
    Department of Electrical and Computer Engineering, Boise State University, 1910 University Dr., Boise, Idaho 83725, United States
    *E-mail [email protected]
  • Randall A. Bassine
    Randall A. Bassine
    Department of Electrical and Computer Engineering, Boise State University, 1910 University Dr., Boise, Idaho 83725, United States
  • Md. Faisal Kabir
    Md. Faisal Kabir
    Department of Electrical and Computer Engineering, Boise State University, 1910 University Dr., Boise, Idaho 83725, United States
  • Jeremy Astle
    Jeremy Astle
    Department of Electrical and Computer Engineering, Boise State University, 1910 University Dr., Boise, Idaho 83725, United States
    More by Jeremy Astle
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ACS Applied Electronic Materials

Cite this: ACS Appl. Electron. Mater. 2019, 1, 1, 96–104
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https://doi.org/10.1021/acsaelm.8b00034
Published December 20, 2018

Copyright © 2018 American Chemical Society. This publication is licensed under CC-BY.

Abstract

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We demonstrate that a device composed of sputtered amorphous chalcogenide Ge2Se3/M + Ge2Se3 (M = Sn or Cu) alternating layers functions as an optically gated transistor (OGT) and can be used as an access transistor for a memristor memory element. This transistor has only two electrically connected terminals (source and drain), with the gate being optically controlled, thus allowing the transistor to operate only in the presence of light (385–1200 nm). The switching speed of the OGTs is <15 μs. The OGT is demonstrated in series with a Ge2Se3 + W memristor, where we show that by altering the light intensity on the OGT gate, the memristor can be programmed to a continuous range of nonvolatile memory states using the saturation current of the OGT as a programming compliance current. By having a continuous range of nonvolatile states, one memory cell can potentially achieve 2n levels. This high density, combined with optical programmability, enables hybrid electronic/photonic memory.

Copyright © 2018 American Chemical Society

Introduction

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The use of resistive random access memory (ReRAM), also known as memristor devices, (1,2) in circuits such as cross-point arrays, (3) spiking neural networks, (4) or other computing applications (5−7) where a large number of these memristive memory elements need to be incorporated into the circuit has been challenging due to their resistive nature. Without proper isolation via a selector device, (8−11) each device behaves within a circuit like it is part of a resistive network. The resistive nature of these memory elements can create multiple unwanted paths of current flow in a cross-point array even when only a single element is being addressed. Because they traverse a path through nonaddressed memristor elements, these currents are termed sneak path currents. They eventually sum with the desired current through the addressed memristor, giving a false reading of the addressed memristor’s state. Circuit techniques to eliminate or reduce sneak path current have included addition of a diode in the memristor device array element. (10,12) A diode in series with each memristor prevents access to a nonaddressed element because the voltage at that node remains lower than the forward voltage of the diode, preventing current flow through the memristor element. This is a reasonable approach for the case of unipolar memristor elements that can change state with the application of a single polarity electronic input signal, such as phase-change devices. However, bipolar memristors, such as the redox-based memristors, (13) need both a positive and negative potential to increase and decrease the element’s resistance state. A circuit design option to allow for both polarities is to use two diodes with opposite direction in series with the memristor element in an array. Because this increases the array feature size, it is not the best solution in many circuit design situations. Another way that memory elements have been addressed is through the use of a traditional access transistor, the most common being a MOSFET access transistor. This type of access transistor is typically used in an array where the voltages applied to the bit and word lines are at fixed values. In this case, the MOSFET access transistor allows the memory element to be electrically accessed by application of a pulse to the MOSFET gate that turns it ON, allowing current to flow between the source and drain terminals, with some fixed transistor drain-to-source resistance, Rds. The memory element is placed in series with the drain and source, and when the MOSFET is ON, it has a resistance of Rds, resulting in a voltage divider between the memory element resistance and the transistor drain to source resistance. This is not a desirable situation for a memristor element due to the varying nature of the memristor’s resistance within a fixed circuit path, especially if multistate programming is desired. The variable resistance creates a variable voltage across the memristor due to the voltage divider and can lead to memristor device failure or a “stuck” state. Researchers have therefore been investigating alternate materials and devices to act as “selector” devices that can prevent sneak-path current in memristor arrays. (10,14) These include the ovonic threshold switch (OTS) (15,16) and other materials such as Cu-doped HfO2 (17) and Ag-based materials. (18−20) These selector materials are incorporated in series with the memristor and must be electrically driven to a state that allows the memristor to be either read (without perturbation) or programmed (higher or lower resistance). While the materials may vary, there are common themes among them. First, these selector materials must all be electrically switched. For optimum circuit design, the selector device electrical properties need to complement the memristor it will be used with. Considerations include consistent threshold voltage, switching speed, operating temperature tolerance, uni- or bidirectional operation, and number of cycles possible. Most of the selector devices have a distribution of threshold voltages. (19) In some materials, especially those that rely on Ag or Cu metal filament formation to produce the threshold switching, (17−20) the switching is not bidirectional, (19) meaning that the switching properties in the reverse voltage direction are different than in the forward voltage direction. (18) In some cases, this limits their use to unidirectional memristor elements such as phase change memory. Second, many of the selector devices, especially the Ag- and Cu-based selector devices, are sensitive to temperature. The metal can migrate into the material and saturate it with increased temperature or cycling, leading to large variations in threshold voltages (especially low voltages at higher temperatures) and eventual device failure due to metal saturation, leading to the inability to switch. Third, selectors may have low ON and OFF ratios (“selectivity”). Last, the switching speeds may be too long. Attempts to incorporate two different selector materials in series to produce an optimum hybrid selector to achieve a faster switching and higher selectivity have been performed using Ag-SiTe-based selectors and NbOx selectors. (18) While the initial results show promise, the operational timing between selector elements is complicated and may be difficult to achieve consistently.
Given the need for new selector device options, we have investigated the amorphous chalcogenide Ge2Se3, composed of alternating layers of doped/undoped material, to achieve an optically controlled selector device with current–voltage (IV) properties similar to a light-gated transistor. (21) The photoinduced properties of GeSe alloys have long been an area of research interest and have more recently been studied as electrically driven selector materials. (15,16) GeSe materials are known for their photoinduced responses, such as photoconductivity and photoinduced defects, (22) as well as structural and morphological changes due to light exposure. (23) More recently, crystalline GeSe2 has been investigated for optoelectronic switching applications (24) and as wide band gap materials for waveguides. (25) In the work reported here, we experimentally demonstrate two different optically gated access transistors (OGTs) composed of four alternating layers of amorphous Ge2Se3/M + Ge2Se3 films (M = Sn or Cu) deposited on a thin native oxide layer on p-Si. The chalcogenide material acts as the gate, using light instead of voltage, making this a two (electrical) terminal and one optical terminal transistor. Metallic (W) source and drain electrodes are placed directly on the chalcogenide material stack.
Both OGT device types, Cu + Ge2Se3 and Sn + Ge2Se3, were tested in a circuit in series with a memristor to investigate memristor state programming through the optically gated access transistor/selector device. LED light was used to gate the OGT ON to access and allow current to flow through the memristor. IV curves were measured for the OGTs and memristors separately and across the series combination of the two devices.

Methods

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Fabrication of the Optically Gated Transistor (OGT) and Memristor

The OGT and memristor devices were fabricated in the Idaho Microfabrication Laboratory at Boise State University. The OGT devices were fabricated on p-Si wafer pieces taken from 200 mm wafers (1–100 ohm·cm, Microsil, LLC Silicon Services). An AJA International ATC Orion 5 UHV magnetron sputtering system and a Ge2Se3 target from Processed Materials were used to sputter alternating layers of 100 Å Ge2Se3 (rf sputtered) and a 30 Å layer of cosputtered M + Ge2Se3, (M = Cu or Sn), for a total thickness of ∼360 Å (Figure 1a), directly onto the native oxide layer of the p-Si substrate. W electrodes (350 Å) were deposited on the surface using a shadow mask (Figure 1b). The memristors used in this work were fabricated at Boise State University but packaged in an 8-pin DIP package by Knowm, Inc., part BS-AF-W 8, and donated for this work.

Figure 1

Figure 1. Optically gated device structure and electrical measurement description. (a) Optically gated transistor structure, not drawn to scale. The active material consists of alternating layers of Ge2Se3 and cosputtered M + Ge2Se3 where M = Cu or Sn. Each Ge2Se3 layer target thickness is 100 Å, and the M + Ge2Se3 layer target thickness is 30 Å; however, the layers mix during deposition, and the material layers remain amorphous. (b) Top-down optical view of the electrodes and separation of the OGT.

Raman spectra were collected of the Ge2Se3 and M + Ge2Se3 OGT films using a Renishaw inVia Raman confocal microscope with a 1 μm beam spot size.
The UV–vis index of refraction, n, and extinction coefficient, k, data were collected using an n&k Technology 1280 broadband UV–vis spectrometer with thin films deposited on quartz substrates (Alfa Aesar, #042295 quartz microscope slide, fused, 25.4 × 25.4 × 1.0 mm3, GE type 124 grade quartz).

Electrical Testing

The OGT was electrically tested at the wafer level on a microprobe station equipped with Cascade Microtech micromanipulators and size 7B W probe tips. An HP4156A semiconductor parameter analyzer was used for IV measurements. A 470 nm LED (C503B-BAN-CY0C0461, Cree, Inc.) was used as a light source for the IV sweep measurements, and a 770 nm LED (MTE1077N1-R, Marktech Optoelectronics) was used for the switching time measurements. It should be noted that a broadband microscope light source (from the microprobe station) as well as LEDs with wavelengths of 385, 525, 590, 616, 770, 850, 1060, and 1200 nm also worked to effectively gate the OGT ON. The LED was connected to the microscope objective of the microprobe station, so that it was placed directly above the OGT, roughly centered between the electrodes during measurements (Figure 2). The LED driver circuit consisted of a series resistor and a variable dc voltage, supplied from a Digilent Analog Discovery 2 (AD2). The AD2 also supplied the pulses for switching response tests. The two-channel oscilloscope on the AD2 was used to collect the switching speed data from the OGT. The LED intensity was measured using a Thor Laboratories PM16-121 standard photodiode sensor with a detector area of 9.7 mm × 9.7 mm. The light intensity was measured before and after the OGT circuit measurements; however, while effort was made to place the power meter detector at the same location as the sample, it is not exact. The power readings reported are with respect to the detector area (mW/cm2) instead of with respect to the area of the OGT since the exact area of illumination or area that contributes to the current is unknown at this research stage.

Figure 2

Figure 2. Electrical testing measurement configuration.

To test the memristor in series with the OGT, the memristor was placed on a breadboard and connected to the OGT via triaxial cables connected to micromanipulator probe tips placed on the OGT W electrodes. The IV sweep measurements were made with the HP4156A connected to one electrode of the OGT and to the bottom electrode of the memristor so that the voltage was swept across the entire circuit. All IV sweep measurements were “double sweep” measurements, meaning that the voltage was incremented forward to the end voltage and then reversed back to the starting voltage. All voltage sweep measurements, in both the positive and negative voltage directions, started and ended at 0 V. To characterize the OGT device alone, the voltage sweep ranged from 0 to ±10 V. The memristor was measured from 0 to ±1 V using a 100 μA compliance current. The memristor–OGT combination circuit was measured using a voltage sweep of 0 to ±2 V. Pulse testing was performed with the AD2 by applying a square pulse train with a 50% duty cycle at a frequency of 100 Hz to the LED drive circuit in place of the dc supply. To measure the switching time, the two-channel AD2 oscilloscope was connected to the pulse train input on the LED drive circuit and to the top electrode of the memristor.

Results and Discussion

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OGT Materials Raman Spectra and Optical Band Gap Estimate

Raman spectra were used to verify the stoichiometry of the Ge2Se3 film, the incorporation of Cu and Sn into the Ge2Se3 material, and that the films were amorphous (Figure 3). Amorphous Ge2Se3 has a Raman spectrum that is distinct from the other GexSe1–x stoichiometries. (26) The incorporation of M into the Ge2Se3 film is apparent by the changes in the Raman features. The most sensitive indicator of doping an amorphous Ge2Se3 thin film is a change in the Ge–Ge homopolar bond peak around 175 cm–1 and the broad peak around 300 cm–1. (26)

Figure 3

Figure 3. Raman spectra of the OGT films: (a) Cu + Ge2Se3, (b) Sn + Ge2Se3, and (c) Ge2Se3.

The absorption coefficient, α, was calculated from the measured extinction coefficient data using the relationship
(1)
where k is the measured extinction coefficient for the film. The optical band gap was estimated using a Tauc plot (Figure 4):
(2)
This corresponds to indirect allowed transitions (27) with an optical gap estimated to be 1.87 eV for Ge2Se3 and 1.61 and 1.85 eV for the Sn and Cu doped, respectively. The undoped Ge2Se3 film optical gap of ∼1.87 eV falls within the range of the GexSe1–x evaporated films previously reported. (28) The decreased optical gap energies for Sn and Cu doped M + Ge2Se3 OGT films are expected when traps are introduced to the film by the addition of dopants. (29)

Figure 4

Figure 4. Tauc plot of each OGT material. The optical gap is estimated to be 1.87 eV for Ge2Se3, 1.61 eV for Ge2Se3 + Sn, and 1.85 eV for Ge2Se3 + Cu.

OGT IV Curves and Photoresponse Speed

IV curves for the OGT device types are shown in Figure 5a–c, under different light intensity conditions, using a 470 nm LED light aimed near the center region between the electrodes. It should be noted that a broadband microscope light source (from the microprobe station) as well as LEDs with wavelengths of 385, 525, 590, 616, 770, 850, 1060, and 1200 nm could effectively gate the OGT ON. When the LED was centered between the two electrodes, the positive and negative current amplitudes were similar (as shown in Figure 5). As the LED was moved toward one electrode, the current at that electrode increased, with the opposite polarity voltage sweep showing a decrease in amplitude, similar to that reported for photocurrent measurements of GeSe2 crystals. (24) As previously reported for GeSe2 crystals, this is an indication that the photoconductivity occurs primarily at the electrode. While this is an issue for a benchtop circuit measurement such as this work, this is not a limitation for integrated circuits and large-scale arrays since the integrated circuit design would be able to fix the position of the light with respect to the OGT electrodes. There is a zero current “dead zone” region around V = 0 in each OGT type which provides a block against unwanted sneak path current when operated as an access transistor for a memristor or resistive memory element. The Sn and Cu + OGT devices have a “dead zone” between approximately ±0.21 and ±0.12 V, respectively. A “dead zone” of approximately the same voltage width is predicted in the theoretical density functional theory calculations of the IV curves for the 2D GeSe/SnS heterobilayer photovoltaic structure. (30) At voltages outside of this zone, the IV curve has a diode-like shape until a voltage is reached where photoinduced current no longer changes with applied voltage (saturation).

Figure 5

Figure 5. OGT IV curves under 470 nm LED variable light intensity illumination. (a) Cu + Ge2Se3 OGT device. (b) Sn + Ge2Se3 OGT device. (c) Undoped Ge2Se3OGT device. An example of IV curves for two different memristors is given in (d). A compliance current of 100 μA (the flat line in the IV curve at 100 μA) was applied only during memristor measurements to protect the device from damage during the dc voltage sweep. Saturation current values in (a–c) correspond to light illumination ranging from a detector reading of 15.23 mW/cm2 at the highest saturation current reading to 28 μW/cm2 for the lowest current reading. The “dark” trace appears near 0 A (pink trace in (a) to (c)).

The memristors used in the OGT–memristor circuit measurements are composed of a set of alternating Ge2Se3/W + Ge2Se3 material layers and selected due to the their compatibility for future OGT–memristor device microfabrication integration. An example of IV curves for two different memristor devices used in the OGT–memristor circuit tests is shown in Figure 5d. A compliance current of 100 μA was used during the IV measurements of the memristor device (not during OGT–memristor circuit measurement) to limit the current through the memristor during IV sweep testing to prevent damage. Given the amorphous nature of the active layer material, the memristors will have a slight variation in threshold voltage and IV curve shape as a function of device operating conditions and history. This is clear when comparing the two different memristor device IV curves in Figure 5d. The memristor write threshold voltage is typically in the range 0.21 to 0.35 V. The erase threshold voltage is typically in the range −50 to −200 mV. The dead zone of each OGT device allows the memristors to switch when the programming voltage is applied and the OGT is illuminated, without the OGT hindering access during a programming operation, yet blocking current flow when a memristor is not being accessed (since those devices will be under dark conditions). The variation in memristor threshold voltage is not an important factor when using the OGT to program a memristor since the OGT is operated at a potential placing it in its saturation regime, which is above any memristor threshold voltage range variation. Therefore, the OGT enables a consistent single circuit operating voltage for programming every memristor device.
The background (“dark”) measurements for the OGT measurements in Figure 5a–c were collected with the LED and room lights off, but not enclosed in a dark box. For purposes of determining photocurrent, the background incident power is considered to correspond to the “dark” current, and the resulting photocurrent (Iph) is the difference between the measured current and I“dark”. For each OGT, the resultant photocurrent is linear with respect to light intensity when measured in the saturation region at 2 V (Figure 6a). This linear response is desirable for a phototransistor device. Also shown in Figure 6a is the photocurrent measured in the OGT–memristor circuit, which aligns with the photocurrent of the OGT devices alone, as expected.

Figure 6

Figure 6. Photocurrent generated by 470 nm illumination during. (a) Photocurrent, Iph = ImeasI“dark” measured at 2 V, as a function of light intensity. Black traces denote the Cu + OGT alone (solid line, open circle symbols) and in series with a memristor (dashed, + symbols); red traces denote the Sn + OGT alone (solid, open square symbols) and in series with a memristor (dashed, × symbols). (b) Iph as a function of V at a light power density of 14.17 mW/cm2 for the OGT devices alone. The measurement is a double sweep (forward and reverse voltage sweep) where the green arrows denote the reverse voltage return path. Regions denoted by 1 correspond to thermally generated carrier dominated current. The region marked by 2 denotes the onset of trap filled conduction, and that marked by 3 denotes the trap-filled limit voltage, where all traps are filled and conduction is space charge limited. Red trace (solid line) corresponds to Cu + OGT; black trace (dashed line) corresponds to Sn + OGT.

Current saturation was not reported for GeSe2 nanocrystals (24) but has been reported in organic crystals where it results from injection limited current at an electrode. (31) In Figure 6b, a plot of the log Iph versus log V for the Cu and Sn + OGTs shows three distinct conduction mechanism regions. (32) The first region, labeled “1” in Figure 6b, is an ohmic conduction region. The voltage at the onset of the second region is denoted by arrows labeled “2” and indicates the voltage at which the transition from ohmic to a trap-filled limited current begins. The voltage at which all traps are completely filled and the conduction becomes space-charge limited (obeying Child’s law) is denoted labeled “3” in Figure 6b. In the OGT devices, the saturation current is due to charge injection filling all available trap states at a given light intensity (Figure 6b). In this scenario, an increase in current with light intensity is likely due to an increase in the concentration of trap states due to photoinduced defect formation. In the memristor–OGT circuit, the saturation current is advantageous since it provides built-in current limiter, variable by light intensity, which is similar to variable state programming of a memristor through compliance current limiting (33−37) and is key to multilevel memristor programming.
The response time of the OGT devices in series with a 1 kohm load resistor using a 770 nm LED light pulse is shown in Figure 7a for a full pulse response and in Figure 7b for an expanded view of the ON to OFF transition. The voltage signal is measured across the 1 kohm load and converted to a current value to show the current through the OGT during the test. When there is no light on the OGT, it is OFF, and the resistor has only background “dark” current through it. The 770 nm LED switching time is in the nanoseconds range, faster than the response speed of the OGTs in the measurement configuration, which is approximately 11 and 15 μs for the Cu + OGT and Sn + OGT devices, respectively. The OFF to ON transition is at least an order of magnitude faster (Figure 7a) than the ON to OFF transition. In contrast, previous studies on GeSe single crystal nanosheet phototransitors have measured switching speeds on the order of 100 ms (OFF to ON transition) and >10 s (ON to OFF) under 808 nm illumination. (38) The OGT speeds are at least 3 orders of magnitude faster than the other light-gated memristor circuits which show ON to OFF transitions of ∼40 s for a CeO2–x/AlOy/Al multilayer structure (39) and milliseconds times for a light-gated memristor composed of CH3NH3PbI3. (40)

Figure 7

Figure 7. Photoswitching response for OGT devices to a 770 nm LED pulse at 7.4 mW/cm2. (a) Response to pulse train. (b) Expanded view of the ON to OFF transition. Sn + OGT, black open circles; Cu + OGT, red open squares. The OGTs are in series with a 1 kohm resistor and biased at 6 V on the drain electrode, with the source electrode connected to the resistor, and the other resistor terminal connected to ground.

Accessing and Programming the Memristor with the OGT Selector

The quasi-static IV curves for the coupled OGT–memristor circuits (no series resistance added to the measurement circuit) are given in Figure 8. Note that in these measurements the light incident on the OGT is kept the same for both samples, including the same background light. The memristor used in this work operates under a similar mechanism as the self-directed channel memristor, (34) except that it contains a sandwiched layer of cosputtered W–Ge2Se3 between two active Ge2Se3 layers which allows it to operate more readily as a continuum-state memristor, with a mixed ion-conducting/phase-change mechanism. The memristor-only IV curve (dashed), for each memristor used in the two different circuits, is superimposed on the circuit IV curves for comparison. The “loop” in the IV curves of the positive voltage sweeps of the OGT–memristor circuits (seen in the region before saturation) show the gating effect on memristor programming. As the voltage is incremented to higher values in the positive direction, the memristor will write to a lower resistance when its threshold voltage is exceeded and the current through the OGT is high enough to latch the device. The saturation current of the transistor, which is set by the light intensity, determines the memristor ON state resistance. The backward voltage sweep, which completes the “loop” in the positive voltage quadrant, shows that the memristor has been written to a lower resistance state. The negative voltage erase sweeps show the memristor in a low resistance state until the memristor erase threshold voltage and current are reached. It is not uncommon for this memristor type to exhibit two erased states, which can be seen in the IV curves for the Cu + OGT/memristor circuit (Figure 8a). This can occur in the W–Ge2Se3 mixed ion-conductor/phase-change memristor device when erase potentials higher than −1 V are applied, such as in this measurement.

Figure 8

Figure 8. IV curves for OGT–memristor circuits. (a) Cu + OGT. (b) Sn + OGT. An IV curve for the memristor used in each OGT circuit is placed on each graph for comparison (∗). (c) Programmed resistance was determined by measuring the resistance of a line fit to the erase curve. (d) OGT–memristor circuit resistance as a function of LED light intensity. Sn + OGT, black open circles; Cu + OGT, red open squares. Illumination source was a 470 nm LED.

Memristors can be programmed to intermediate states through the process of current limiting. (33−37) Because the incident light intensity on the OGT determines its saturation current level, the light intensity can be used to program intermediate states in a memristor device (Figure 8d). The programmed resistance states of the OGT–memristor circuit were determined from the data shown in Figure 8c using the slope of the rising edge of the erase sweep peak.
The OGT–memristor circuit for the Sn + OGT–memristor was also pulse tested (Figure 9). As in the quasi-static IV measurements (Figure 8), no series resistance was added to the pulsed test OGT–memristor measurement circuit. Because of the large capacitance of the experimental setup, long pulse widths (0.5–1 s) were used to reduce capacitive effects. However, it is noted that the memristor has switching speeds in the 10–9 s regime, (34) and the OGT has 10–6 s switching speeds (Figure 7)—much faster than used for the OGT–memristor circuit measurements. Figure 9a demonstrates that the OGT–memristor circuit cycles the memristor between high and low resistance states. In these tests, the OGT–memristor circuit applies a pulse to the OGT to bias it within one of the operation regions of the OGT (Figure 6b). OGT bias pulses correspond to the black traces (right graph axes) in Figure 9a–c. A “read” pulse biases the OGT to a voltage low enough not to perturb the memristor state; this is within the thermally generated current region (region 1 in Figure 6b) of OGT operation. A “write” OGT pulse biases the OGT in the saturation region (region 3 in Figure 6b) in the positive potential direction, thus programming the memristor to a low resistance value. An “erase” OGT pulse also biases the OGT in the saturation region, but in the negative potential direction, thus programming the memristor to a higher resistance value. The voltage across the memristor (left axis, red trace, Figure 9a–c) measures the memristor state change since no series resistor was added to the test circuit. A lower memristor resistance state corresponds to a smaller voltage measurement across the memristor.

Figure 9

Figure 9. Sn + OGT–memristor circuit response to programming pulses. (a) OGT–memristor circuit cycling. (b) Consecutive application of write pulses. (c) Consecutive application of erase pulses. The OGT pulse (black trace, right vertical axis) corresponds to the pulse that biases the OGT into a saturated state. The memristor voltage corresponds to the voltage measured across the memristor. The OGT is driven by a 770 nm LED.

The pulse testing data in Figure 9b,c demonstrate another approach (besides methods of compliance current dc or pulsed programming) of continuously programming the memristor state via continuous resistance changes through either repeating Write (Figure 9b) or Erase (Figure 9c) pulses. The blue curve in each graph highlights the change in memristor resistance state as a function of consecutive pulses. It is clear from these data that the memristance is capable of multistate programming into a continuous range of write and erase states.

Conclusion

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A multipurpose optically gated transistor has been demonstrated that enables nonvolatile photonic memory and (1) functions as an access transistor for a memristor device, (2) enables uniform voltage memristor programming, (3) allows a memristor to be programmed within a continuous range of states by using light intensity applied to the OGT gate, and (4) includes built-in compliance current limiting via the OGT saturation current. When light is applied, the transistor turns ON, analogous to the application of a gate voltage turning on an enhancement mode MOSFET. The applied gate light intensity controls the saturation current level of the OGT. This is an advantage of amorphous materials and their large concentration of trap states: the series resistance in the saturation state acts as a current limiter for the memristor, in the same role as a compliance current limit. Compliance current limiting has also been demonstrated in an amorphous Cu/Ge2Sb2Te5-based memory device with an Ag/TiO2-based selector device. (20) The memory device programming current in that example is self-limiting (similar to a compliance current) likely due to the formation of a CuTe phase within the memory cell which limits growth of the switching Cu filament. In contrast, the OGT in this work also provides compliance current limiting to the memristor but does not rely on the formation and dissolution of a CuTe phase and Cu filament growth control, both of which will have associated randomness due to the amorphous materials disorder. In the OGT, the magnitude of the current that is allowed through the memristor sets the device resistance state; the light intensity therefore directly programs the memristor state. Above a minimum light level, variable light intensity corresponds linearly to the change in memristance. The OGT also shows a reasonable photoresponse time (<15 μs) compared to other light-gated memristors, making it promising for application in a large memristor array. In addition to the light-intensity-based compliance current option for continuous memristor state programming, the application of consecutive pulses to the OGT–memristor circuit can also be used for continuous write and erase state programming.
There are advantages to specifically using amorphous chalcogenide materials in the OGT device, in addition to the advantages stated for amorphous materials in general. Chalcogenides are known for their optical activity and have been used in many optical applications, for example, as photodetectors, phase-change memory devices, waveguides, and photoresist, and their properties have been well-investigated. In addition, the Ge2Se3 OGT devices developed here are compatible with ion-conducting Ge2Se3-based memristors, (34) including the W-Ge2Se3 cosputtered memristor used in this work, making them ideal for incorporation into an existing fabrication process flow. Our ongoing research has shown that, in addition to Sn and Cu, other dopants such as Al, C, and Ti, to name a few, can be used in the Ge2Se3 glass to alter the access device properties, including threshold voltages, saturation current levels, photoresponse time, and light wavelength sensitivity. This research direction may show that OGT devices can be tuned to specific applications. Other research directions include investigation of the effects of oxygen in the OGT. Because the devices tested in this work were not encapsulated, it is possible that oxygen has entered the films over time; however, no effects on the OGT operation have been observed over the past year. Additionally, annealing, which can alter the trap density, and aging are both topics that need to be studied with respect to the OGT operation and are part of the ongoing characterization efforts.

Supporting Information

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The Supporting Information is available free of charge on the ACS Publications website at DOI: 10.1021/acsaelm.8b00034.

  • IV curves for the undoped Ge2Se3–memristor circuit in Figures S1 and S2 (DOCX)

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Author Information

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  • Corresponding Author
  • Authors
    • Randall A. Bassine - Department of Electrical and Computer Engineering, Boise State University, 1910 University Dr., Boise, Idaho 83725, United States
    • Md. Faisal Kabir - Department of Electrical and Computer Engineering, Boise State University, 1910 University Dr., Boise, Idaho 83725, United States
    • Jeremy Astle - Department of Electrical and Computer Engineering, Boise State University, 1910 University Dr., Boise, Idaho 83725, United States
  • Author Contributions

    The manuscript was written through contributions of all authors. K.A.C. developed the OGT and materials, fabrication methods, and electrical testing procedures, supervised all fabrication and measurements, and prepared the manuscript. R.A.B., M.F.K., and J.A. performed OGT fabrication and electrical testing and assisted with manuscript preparation. All authors have given approval to the final version of the manuscript.

  • Funding

    This work was partially supported through sponsorship of M. Alexander Nugent Consulting under U.S. Air Force Research Laboratory Contract FA8750-16-C-0183.

  • Notes
    The authors declare the following competing financial interest(s): The memristor and OGT technology used in this work has been licensed by Boise State University through a royalty-bearing license to Knowm, Inc., and may result in licensed royalties from Boise State University to K.A.C.

Acknowledgments

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The authors acknowledge support from the Department of Electrical and Computer Engineering at Boise State University for this work and Knowm, Inc., for donating the memristors used in this work.

Abbreviations

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IV

current–voltage

MOSFET

metal oxide semiconductor field-effect transistor

OGT

optically gated transistor

RAM

random access memory

ReRAM

resistive random access memory

UV–vis

ultraviolet–visible.

References

Click to copy section linkSection link copied!

This article references 40 other publications.

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  • Abstract

    Figure 1

    Figure 1. Optically gated device structure and electrical measurement description. (a) Optically gated transistor structure, not drawn to scale. The active material consists of alternating layers of Ge2Se3 and cosputtered M + Ge2Se3 where M = Cu or Sn. Each Ge2Se3 layer target thickness is 100 Å, and the M + Ge2Se3 layer target thickness is 30 Å; however, the layers mix during deposition, and the material layers remain amorphous. (b) Top-down optical view of the electrodes and separation of the OGT.

    Figure 2

    Figure 2. Electrical testing measurement configuration.

    Figure 3

    Figure 3. Raman spectra of the OGT films: (a) Cu + Ge2Se3, (b) Sn + Ge2Se3, and (c) Ge2Se3.

    Figure 4

    Figure 4. Tauc plot of each OGT material. The optical gap is estimated to be 1.87 eV for Ge2Se3, 1.61 eV for Ge2Se3 + Sn, and 1.85 eV for Ge2Se3 + Cu.

    Figure 5

    Figure 5. OGT IV curves under 470 nm LED variable light intensity illumination. (a) Cu + Ge2Se3 OGT device. (b) Sn + Ge2Se3 OGT device. (c) Undoped Ge2Se3OGT device. An example of IV curves for two different memristors is given in (d). A compliance current of 100 μA (the flat line in the IV curve at 100 μA) was applied only during memristor measurements to protect the device from damage during the dc voltage sweep. Saturation current values in (a–c) correspond to light illumination ranging from a detector reading of 15.23 mW/cm2 at the highest saturation current reading to 28 μW/cm2 for the lowest current reading. The “dark” trace appears near 0 A (pink trace in (a) to (c)).

    Figure 6

    Figure 6. Photocurrent generated by 470 nm illumination during. (a) Photocurrent, Iph = ImeasI“dark” measured at 2 V, as a function of light intensity. Black traces denote the Cu + OGT alone (solid line, open circle symbols) and in series with a memristor (dashed, + symbols); red traces denote the Sn + OGT alone (solid, open square symbols) and in series with a memristor (dashed, × symbols). (b) Iph as a function of V at a light power density of 14.17 mW/cm2 for the OGT devices alone. The measurement is a double sweep (forward and reverse voltage sweep) where the green arrows denote the reverse voltage return path. Regions denoted by 1 correspond to thermally generated carrier dominated current. The region marked by 2 denotes the onset of trap filled conduction, and that marked by 3 denotes the trap-filled limit voltage, where all traps are filled and conduction is space charge limited. Red trace (solid line) corresponds to Cu + OGT; black trace (dashed line) corresponds to Sn + OGT.

    Figure 7

    Figure 7. Photoswitching response for OGT devices to a 770 nm LED pulse at 7.4 mW/cm2. (a) Response to pulse train. (b) Expanded view of the ON to OFF transition. Sn + OGT, black open circles; Cu + OGT, red open squares. The OGTs are in series with a 1 kohm resistor and biased at 6 V on the drain electrode, with the source electrode connected to the resistor, and the other resistor terminal connected to ground.

    Figure 8

    Figure 8. IV curves for OGT–memristor circuits. (a) Cu + OGT. (b) Sn + OGT. An IV curve for the memristor used in each OGT circuit is placed on each graph for comparison (∗). (c) Programmed resistance was determined by measuring the resistance of a line fit to the erase curve. (d) OGT–memristor circuit resistance as a function of LED light intensity. Sn + OGT, black open circles; Cu + OGT, red open squares. Illumination source was a 470 nm LED.

    Figure 9

    Figure 9. Sn + OGT–memristor circuit response to programming pulses. (a) OGT–memristor circuit cycling. (b) Consecutive application of write pulses. (c) Consecutive application of erase pulses. The OGT pulse (black trace, right vertical axis) corresponds to the pulse that biases the OGT into a saturated state. The memristor voltage corresponds to the voltage measured across the memristor. The OGT is driven by a 770 nm LED.

  • References


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    16. 16
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    17. 17
      Luo, Q.; Xu, X.; Lv, H.; Gong, T.; Long, S.; Liu, Q.; Li, L.; Liu, M. Endurance Characterization of the Cu-Dope HfO2 Based Selection Device With One Transistor-One Selector Structure. 2017 IEEE Electron Devices Technology and Manufacturing Conference (EDTM), Toyama , 2017; pp 178179.
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      Song, B.; Xu, H.; Liu, S.; Liu, H.; Li, Q. Threshold Switching Behavior of Ag-SiTe-Based Selector Device and Annealing Effect on Its Characteristics. IEEE J. Electron Devices Soc. 2018, 6, 674679,  DOI: 10.1109/JEDS.2018.2836400
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  • Supporting Information

    Supporting Information


    The Supporting Information is available free of charge on the ACS Publications website at DOI: 10.1021/acsaelm.8b00034.

    • IV curves for the undoped Ge2Se3–memristor circuit in Figures S1 and S2 (DOCX)


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