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Ternary Content-Addressable Memory Based on a Single Two-Dimensional Transistor for Memory-Augmented Learning
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    Ternary Content-Addressable Memory Based on a Single Two-Dimensional Transistor for Memory-Augmented Learning
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    • Jun Cai
      Jun Cai
      Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47907, United States
      Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana 47907, United States
      More by Jun Cai
    • Peng Wu*
      Peng Wu
      Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139, United States
      Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139, United States
      *Email: [email protected]
      More by Peng Wu
    • Rahul Tripathi
      Rahul Tripathi
      Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47907, United States
      Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana 47907, United States
    • Jing Kong
      Jing Kong
      Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139, United States
      Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, Massachusetts 02139, United States
      More by Jing Kong
    • Zhihong Chen
      Zhihong Chen
      Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47907, United States
      Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana 47907, United States
      More by Zhihong Chen
    • Joerg Appenzeller*
      Joerg Appenzeller
      Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47907, United States
      Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana 47907, United States
      *Email: [email protected]
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    ACS Nano

    Cite this: ACS Nano 2024, 18, 34, 23489–23496
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    https://doi.org/10.1021/acsnano.4c07024
    Published August 13, 2024
    Copyright © 2024 American Chemical Society

    Abstract

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    Ternary content-addressable memory (TCAM) is promising for data-intensive artificial intelligence applications due to its large-scale parallel in-memory computing capabilities. However, it is still challenging to build a reliable TCAM cell from a single circuit component. Here, we demonstrate a single transistor TCAM based on a floating-gate two-dimensional (2D) ambipolar MoTe2 field-effect transistor with graphene contacts. Our bottom graphene contacts scheme enables gate modulation of the contact Schottky barrier heights, facilitating carrier injection for both electrons and holes. The 2D nature of our channel and contact materials provides device scaling potentials beyond silicon. By integration with a floating-gate stack, a highly reliable nonvolatile memory is achieved. Our TCAM cell exhibits a resistance ratio larger than 1000 and symmetrical complementary states, allowing the implementation of large-scale TCAM arrays. Finally, we show through circuit simulations that in-memory Hamming distance computation is readily achievable based on our TCAM with array sizes up to 128 cells.

    Copyright © 2024 American Chemical Society

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    Supporting Information

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    The Supporting Information is available free of charge at https://pubs.acs.org/doi/10.1021/acsnano.4c07024.

    • AFM characterization of the MoTe2 FET; Output characteristics of the ambipolar MoTe2 FET; Transfer characteristics of graphene; Ballistic transport simulation of MoTe2 FET with normal metal contacts and graphene contacts; 3-layer MoTe2 FET; Fabrication process of the floating-gate MoTe2 FET; Operating band diagrams of the floating-gate FET; Transfer characteristics of more single TCAM cells; Experimental demonstration of 1 × 4 1T TCAM array; Endurance of the floating-gate FET; Characterization of state “do not care”; Sampled voltage levels for different array sizes; Few-shot learning accuracies; Benchmark of nonvolatile TCAM designs (PDF)

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    ACS Nano

    Cite this: ACS Nano 2024, 18, 34, 23489–23496
    Click to copy citationCitation copied!
    https://doi.org/10.1021/acsnano.4c07024
    Published August 13, 2024
    Copyright © 2024 American Chemical Society

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