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Intrinsic Electron Mobility Exceeding 103 cm2/(V s) in Multilayer InSe FETs

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    Intrinsic Electron Mobility Exceeding 103 cm2/(V s) in Multilayer InSe FETs
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    † Department of Physics, Case Western Reserve University, 2076 Adelbert Road, Cleveland, Ohio 44106, United States
    ‡ ‡Department of Chemistry and §Center for Condensed Matter Sciences, National Taiwan University, Taipei 10617, Taiwan
    ∥ Institute of Physics, Academia Sinica, Taipei 11529, Taiwan
    ⊥ Institute of Atomic and Molecular Sciences, Academia Sinica, Taipei 10617, Taiwan
    Solon High School, 33600 Inwood Dr, Solon, Ohio 44139, United States
    *E-mail: [email protected]
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    Nano Letters

    Cite this: Nano Lett. 2015, 15, 6, 3815–3819
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    https://doi.org/10.1021/acs.nanolett.5b00493
    Published April 29, 2015
    Copyright © 2015 American Chemical Society
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    Abstract

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    Graphene-like two-dimensional (2D) materials not only are interesting for their exotic electronic structure and fundamental electronic transport or optical properties but also hold promises for device miniaturization down to atomic thickness. As one material belonging to this category, InSe, a III–VI semiconductor, not only is a promising candidate for optoelectronic devices but also has potential for ultrathin field effect transistor (FET) with high mobility transport. In this work, various substrates such as PMMA, bare silicon oxide, passivated silicon oxide, and silicon nitride were used to fabricate multilayer InSe FET devices. Through back gating and Hall measurement in four-probe configuration, the device’s field effect mobility and intrinsic Hall mobility were extracted at various temperatures to study the material’s intrinsic transport behavior and the effect of dielectric substrate. The sample’s field effect and Hall mobilities over the range of 20–300 K fall in the range of 0.1–2.0 × 103 cm2/(V s), which are comparable or better than the state of the art FETs made of widely studied 2D transition metal dichalcogenides.

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    Supporting Information

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    Typical device‘s subthreshold swing, ON−OFF ratio, field effect mobility versus gate voltage, gate capacitance, and effect of substrate dielectric on device's hysteresis (including Figures S1−S4 and Table S1). The Supporting Information is available free of charge on the ACS Publications website at DOI: 10.1021/acs.nanolett.5b00493.

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    Cite this: Nano Lett. 2015, 15, 6, 3815–3819
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