Microscopic Analysis of Interdiffusion and Void Formation in CdTe(1–x)Sex and CdTe Layers

The use of CdSe layers has recently emerged as a route to improving CdTe photovoltaics through the formation of a CdTe(1–x)Sex (CST) phase. However, the extent of the Se diffusion and the influence it has on the CdTe grain structure has not been widely investigated. In this study, we used transmission electron microscopy (TEM), energy-dispersive X-ray spectroscopy (EDS), and electron backscatter diffraction (EBSD) to investigate the impact of growing CdTe layers on three different window layer structures CdS, CdSe, and CdS/CdSe. We demonstrate that extensive intermixing occurs between CdS, CdSe, and CdTe layers resulting in large voids forming at the front interface, which will degrade device performance. The use of CdS/CdSe bilayer structures leads to the formation of a parasitic CdS(1–x)Sex phase. Following removal of CdS from the cell structure, effective CdTe and CdSe intermixing was achieved. However, the use of sputtered CdSe had limited success in producing Se grading in CST.


■ INTRODUCTION
Since 2011 the efficiency of CdTe-based photovoltaics (PV) has improved significantly from 17 to over 22%, following a period of nearly 2 decades where CdTe device efficiencies stagnated, leading to questions as to whether the technology had peaked. 1−3 The improvement over this period has largely been driven by a redevelopment of the device n-type "window layer" structure. Previously, CdS was ubiquitous as the defined n-type partner layer for CdTe PV. However, due to parasitic absorption at short wavelengths (<550 nm), the device shortcircuit current density (J SC ) was always compromised. 4,5 This led to higher band gap alternatives to CdS being investigated with mixed success. 6−10 The use of CdSe then emerged as an alternative approach to CdS removal. As CdSe has a band gap of 1.7 eV compared with 2.5 eV for CdS, this approach seems counterintuitive as one would anticipate enhanced optical losses by incorporating this layer into the device structure. However, due to the high Se diffusion rate, CdSe completely diffuses into the CdTe layer during cell processing converting from the photo inactive CdSe wurzite phase to the photoactive CdTe (1−x) Se x (CST) zincblende structure. 11,12 Due to the band bowing effect, this CST structure has a lower band gap than CdTe, 1.38 eV compared to 1.5 eV, meaning additional collection is possible at longer wavelengths. 11 In addition to this, the use of the CST phase changes the nature of device junction, appearing to alleviate strain resulting from lattice mismatch. This has allowed CST/CdTe to omit the CdS layer and instead be coupled with an oxide partner without significant performance losses. 11,13 There is also evidence that Se diffusion into the CdTe layer can have additional benefits such as defect passivation. 14 Adoption of devices that contain CST phases led to gains in device photo response at both short and long wavelengths and near optimization of the device J SC . It has also been reported that a band gap grading effect in the CST/CdTe structure may be generated that improves carrier lifetimes. 15,16 While J SC values have been improved, the complete removal of the CdS layer has typically resulted in a reduced open-circuit voltage (V OC ); therefore, a thin CdS layer is often still required to gain high efficiencies in most cases. 11,13,17 There is some evidence that maintaining a CdS layer is problematic as Se diffuses not just into the CdTe layer but also the CdS layer, forming a CdS (1−x) Se x phase that contributes to further optical losses. 18 This diffusion means that only a very thin CdS layer can be used and the intermixing of these layers needs to be finely controlled. Most of the work on this topic has so far focused on the device efficiencies and cell processing. The mechanisms of Se diffusion in CdTe solar cells require further systematic analysis but can be challenging, primarily because the device front interface is buried and does thus not allow easy examination. In addition to this, there has been little work done on the effect the CdSe layer and Se diffusion is having on the structural properties of the CdTe film and whether the Se distribution can be controlled well enough to achieve an efficient grading effect.
In this work, we use cross-sectional scanning electron miscopy (SEM) and scanning transmission electron microscopy (STEM) to analyze CdTe films grown via close space sublimation (CSS) on three different window layer structures CdS, CdSe, and CdS/CdSe produced via sputtering. We apply energy-dispersive X-ray spectroscopy (EDS) to map the elemental composition of the films, with a particular focus on the S, Se, and Te distributions and thus interdiffusion of layers. It will be shown that there is extensive S/Se interdiffusion that fundamentally limits the use of the CdS/ CdSe layer structure and that the Se distribution is far from ideal, with little evidence of a grading effect. It will also be demonstrated that during device processing excessive intermixing between the CdS, CdSe, and CdTe layers occurs leading to the formation at voids at the interfaces. Electron backscatter diffraction (EBSD) is used to determine the effect the device window layer has on the phase identification and grain structure of the CdTe films.

■ EXPERIMENTAL SECTION
CdTe structures were produced in the conventional "superstrate" configuration utilizing a variety of different window layers; the structures used in this work are shown in Figure 1a−c (CdS/CdTe, CdS/CdSe/CdTe, CdSe/CdTe). All stacks were deposited on NSG Ltd TEC 15 glass (F-doped SnO 2 (FTO)-coated glass). Undoped SnO 2 "buffer" layers (100 nm) were deposited by chemical vapor deposition (CVD) at 600°C.
Hundred nanometers of CdS was deposited via radio frequency (RF) sputtering at room temperature, using a chamber pressure of 5 mTorr (0.66 Pa) using Ar as the working gas and a power density of 1.32 W cm −2 . The base pressure reached in the sputtering chamber is 1.9 × 10 −5 Torr (2.53 mPa). Hundred nanometers of CdSe layers were also deposited by RF sputtering at room temperature using a chamber pressure of 5 mTorr using Ar as the working gas and power density of 1.32 W cm −2 . For CdS/CdSe stacks, the combined thickness was 200 nm.
CSS was used to deposit 4−6 μm of CdTe at source and substrate temperatures of 610 and 510°C, respectively. The CdTe growth was performed in a two-stage process using: (i) a "higher pressure" growth at 30 Torr (3.99 kPa) in a nitrogen atmosphere (N 2 ) for 14 min and (ii) a "lower pressure" growth at 1 Torr (133.2 Pa) for 30 s. The growth at the higher pressure facilitates the growth of larger grains, while the growth at the lower pressure avoids the formation of pinholes. 19 All samples were in situ post CdTe growth annealed at 610°C in the CSS chamber at an "elevated" pressure of 200 Torr (26.66 kPa) for 20 min. This process is to aid the conversion of the nonphoto active CdSe to the photoactive CST structure. 13 Samples were purposely not chlorine treated so the Se distribution could be isolated from that of chlorine, which is considered standard for good device performance. 20 This was done to minimize the process variables, and it has been previously shown that the chlorine treatment has little impact on S, Se, and Te diffusion during chlorine treatment for CSS CdTe structures. 21 Instead, post deposition in situ annealing at the growth temperature was found to be the dominant route to controlling the Se diffusion, with chloride treatment having minimal influence. 13 Because of the large starting grain size, the chloride treatment would also cause minimal recrystallization of the CdTe grain structure. 22 Focused ion beam (FIB) cross sections for SEM and STEM analysis were prepared using an FEI Helios MK2 Nanolab Dual Beam system. STEM analysis was performed using a JEOL 2100F transmission electron microscope operated at 200 keV equipped with an Oxford instruments X-Max 65T EDS detector. EBSD samples were prepared by low broad ion beam milling using a Model 691 Gatan precision ion polishing system (PIPS) until the surface became mirrorlike. EBSD analysis of the plan-view and cross-sectional samples was performed in a FEI Nano Helios Mk2 dual beam system, equipped with an Oxford Instruments EBSD high-sensitivity Nordlys S and Aztec acquisition software 2.2. The Kikuchi patterns were generated at 15 keV, 5000× magnification, and 5.5 nA, with a working distance of 11 mm and an EBSD step size of 0.2 μm. CdTe layer deposited on CdS, CdS/CdSe, and CdSe, respectively. Samples that contain Se have been labeled as CST; however, as will be shown, the Se content is effectively zero away from the interface. The predominant feature of these images is that the change of the window layer has had a clear impact on the device interface. CdTe deposited on CdS (Figure 2a,d) shows minimal evidence of void formation at the interface, with a relatively uniform coverage of the underlying CdS layer. In contrast, the CdTe layer deposited onto a CdS/  CdSe stack (Figure 2b,e) shows the formation of a distinct region at the interface populated with large voids. It has previously been suggested that the device photo response is reduced for the CdS/CdSe/CdTe stack due to extensive intermixing between the CdS and CdSe; 13 hence, the presence of large voids at the interface would seem suggestive of a large amount of intermixing occurring during the CSS CdTe deposition. Similar voids at the front interface can also be seen for CdSe/CdTe stack (Figure 2c,f); in this instance, intermixing will likely occur between the CdSe and CdTe. The intention is for the CdSe layer to completely diffuse into the CdTe layer forming the desired CST phase. There is no evidence of a residual CdSe layer implying that the complete dissolution of the layer has occurred. However, the resulting void formation is clearly problematic. The voids are believed to form due to the Kirkendall effect, where asymmetry in the diffusion flux between different species (e.g., S/Se/Te) leads to a vacancy flux that gives rise to the porosity. If the diffusion fluxes are balanced, intermixing can occur without void formation, but this is clearly not the case here. 23,24 Voids present in the device structure would be expected to limit device V OC , as has been reported for other PV architectures such as CIGS and Ag 2 ZnSnSe 4 . 25, 26 Avancini et al. demonstrated that voids present in the device structure significantly reduced device performance, particularly effecting device V OC and FF. It was found that voids introduced a high amount of unpassivated, highly recombinative free surfaces at the interface which increased the recombination velocity and reduced V OC . 27 Prior work on CdS/CdSe/CdTe and CdSe/ CdTe device structures showed a reduced V OC when compared to the CdS/CdTe structure; 11,13 hence, void formation may be a key contributor to this loss. Figure 3 shows the EDS maps linked to STEM cross sections for the CdS/CdTe sample. The STEM image is given in Figure 3a with profiles for Cd, Te, and S shown in Figure  3b−d, respectively. Figure 3e shows an extracted EDS line scan for all of the elements to allow for easy comparison. The EDS analysis shows two distinct regions for the CdS layer and CdTe layers. From the S profile, there is only limited S out diffusion into the CdTe layer and vice versa for Te, due to the relatively low solubility of S−Te. The residual CdS layer will lead to parasitic absorption in this layer and reduction of device J SC , a phenomenon that is commonly observed in CdS/CdTe-based photovoltaics. 28,29 Figure 4 shows comparative STEM EDS maps for CdS/ CdSe/CdTe with the addition of a Se map in Figure 4d. The S and Se profiles (Figure 4c,d) demonstrate extensive intermixing between the CdS and CdSe layers. Extracted line-scan data shows an overlap of S and Se signals (Figure 4f), confirming the formation of the CdS (1−x) Se x phase at the interface between the two layers, which was postulated as the reason for the enhanced losses at a short wavelength in previous work. 10,13,30 The Te EDS map (Figure 4e) shows the negligible Te content in the CdS/CdSe layer region and only the minimal Se content in the CdTe layer at the near interface. We also note that the Te signal is heavily influenced by overlap with the Sn signal coming from beam spreading into the FTO; hence, the increase at the near interface is likely artifact. We may infer that the solubility of Te into the mixed CdS (1−x) Se x phase is low and S/Se interdiffusion dominates. The introduction of the CdSe layer into the CdS layer also seems to have done little to enhance the solubility of the CdS and CdTe layers. 31 From this analysis, it seems that there has been minimal CST formation for this device structure and the bulk of the absorber layer remains ear pure CdTe. Figure 5 shows a STEM image and EDS maps for a CdSe/ CdTe structure, i.e., the CdS layer has been removed from the structure. From the Te map (Figure 5d) and the line scan for all elements (Figure 5e), it is clear that Te/Se interdiffusion has been enhanced via the removal of the CdS layer. A high Te content can now be detected at the near SnO 2 interface, and in addition to Se diffusion into the CdTe layer, Te also appears to diffuse into CdSe to form the CST layer. The mapping of the Se content although suggests a less defined Se-containing region and the higher Se content further into the CdTe layer when compared with Figure 4d. When compared to the CdS  While the Te and Se profiles indicate the formation of the desired CST phase, the Se profiles (Figure 5c,e) show very little evidence of a graded Se content throughout the entire CdTe layer. Instead, there is very high Se content at the nearfront interface and relatively low content throughout the remainder of the CdTe layer. This is similar to the data present by Ablekim et al. where limited Se diffusion into the CdTe layer was demonstrated, with the Se content predominately in the first 500 nm. 32 Removal of the CdS layer has not however counteracted the problem of void formation due to intermixing, with numerous voids still being apparent. While the use of sputtered CdSe can clearly achieve some measure of Se diffusion through the CdTe layer during deposition, the formed CST phase may be compromised by the void formation and the lack of an effectively graded band gap.

■ RESULTS
To assess if changing the window layer stack is having an influence on the CdTe structural properties, EBSD was applied to the three different CdTe layers. Figure 6a−c shows planar EBSD orientation maps for CdTe deposited on CdS, CdS/ CdSe, and CdSe, respectively. The (111) pole figures, inverse pole figures, and grain size distribution for each EBSD image are also shown. The color variation reflects various grain orientations and the misorientation angle between adjacent grains. Back surface measurements show that the CdTe back surface is highly (111) orientated regardless of the window   As the dominant changes in the material occur at the CdTe/ window layer interface, EBSD analysis was repeated on device cross sections. Figure 7a−c shows the cross-sectional EBSD maps for CdS/CdTe, CdS/CdSe/CdTe, and CdSe/CdTe structures, respectively. Both CdS/CdTe and CdS/CdSe/ CdTe again show similar highly preferred (111) orientation throughout the film. The CdTe layer grown on CdSe does again show subtle differences, with a more random orientation being shown throughout the CdTe when compared to the CdS alternatives. This is consistent with subtle changes detected in inverse pole figures for the back surface analysis. In the CdSe/ CdTe sample, Se and Te more readily diffuse, leading to the differences in CdTe growth at the near interface region. The presence of the resulting CST causes a slight orientation change and a reduction in grain size. In addition to this, in the CdSe/CdTe sample close to the interface, the grain structure consists of smaller, roughly equi-axed grains in random orientation (this is clearly evident from the STEM images and EBSD cross sections, Figures 5a and 7c, respectively). From these, grains with a (111) orientation grow favorably into a columnar structure to minimize the surface energy. Therefore, although all films show (111) texture, it is the randomly oriented equi-axed region that controls recombination within the depletion region, and this is likely to have the biggest effect on V OC . This could possibly explain the reduced V OC observed in the CdSe/CdTe devices. 13 As Se was shown to not diffuse toward the back surface meaning that the back surface is mainly CdTe, which is the reason why minimal differences are seen in the planar back surface EBSD images.

■ CONCLUSIONS
The grain structure, interdiffusion, and preferred orientation of CdTe deposited on a variety of window layer structures, CdS, CdS/CdSe, and CdSe was investigated. Cross-sectional SEM and STEM were performed on these to evaluate the structure and chemical composition at the CdTe/window layer interface region and in the bulk. The CdS/CdSe and CdSe structures showed void formation at the interface region due to excessive intermixing between the CdS, CdSe, and CdTe layers.
The EDS elemental mapping of a CdS/CdSe/CdTe structure showed intermixing occurring primarily between the CdS and CdSe layer forming the CdS (1−x) Se x phase and limiting desired Se/Te intermixing. These results demonstrate that a CdS/CdSe structure may be fundamentally limiting device structures due to the formation of this CdS (1−x) Se x phase. The CdSe/CdTe structure showed high Se/Te interdiffusion at the near interface, but there was no significant Se grading observed in the CST layer.
Planar EBSD imaging was used to show that all of the CdTe samples exhibited a (111) oriented film, indicating that the window layers had a subtle influence on the CdTe structure. Cross-sectional EBSD mapping confirmed that the sample grown on CdSe had a more random orientated grain structure at the interface and in the bulk, indicating that the switch to CdSe and CST formation does modify the grain growth at the near interface region.
These results indicate that the use of a sputtered CdSe layer followed by interdiffusion with CdTe to form CST may be limited by the formation of voids at the front interface and by the inability to effectively control the grading of the Se content. From the evidence presented here it seems a cosputtered or cosublimated CST layer may be a more efficient way to achieve the desired photovoltaic parameters. 3,33 Data files related to the project are available from http:// datacat.liverpool.ac.uk/id/eprint/1101 or from the corresponding author.