Mixed Dimensional ZnO/WSe2 Piezo-gated Transistor with Active Millinewton Force Sensing

This work demonstrates a mixed-dimensional piezoelectric-gated transistor in the microscale that could be used as a millinewton force sensor. The force-sensing transistor consists of 1D piezoelectric zinc oxide (ZnO) nanorods (NRs) as the gate control and multilayer tungsten diselenide (WSe2) as the transistor channel. The applied mechanical force on piezoelectric NRs can induce a drain–source current change (ΔIds) on the WSe2 channel. The different doping types of the WSe2 channel have been found to lead to different directions of ΔIds. The pressure from the calibration weight of 5 g has been observed to result in an ∼30% Ids change for ZnO NRs on the p-type doped WSe2 device and an ∼−10% Ids change for the device with an n-type doped WSe2. The outcome of this work would be useful for applications in future human–machine interfaces and smart biomedical tools.


S1. Supplementary method: Device fabrication
The fabrication of the 1D-2D transistor includes the fabrication of 2D WSe2 FET and the integration of ZnO NRs on top of WSe2, as shown in Figure S1. Mechanical exfoliated WSe2 flakes have been selected as the channel of the transistor. 2D WSe2 FET has been fabricated by photolithography; the details of the photolithography steps on the 2D WSe2 channel patterning and electrode patterning have been presented. The optical images of the 2D WSe2 FETs on both devices have been presented in Figure S2. The first device (Dev.1) has an over-etched WSe2 channel (see Figure   S2 (b)), which could have a p-typed doped behaviour due to the edge defects induced by the XeF2 vapour 1 . As for Dev.2, pristine WSe2 has been selected as a channel of FET, which could be n-doped FET. The NRs lift-off method has been used for the patterning of ZnO NRs on WSe2 FET. Therefore, for Dev.2, there is a Ti metal layer between the ZnO seed layer and the WSe2 channel. The P++ Si has been used as the substrate and the back-gate, with 300 nm thick SiO2 as the back-gate dielectric and 100 nm thick Ti as the back-gate contact.
WSe2 flakes have been exfoliated mechanically and transferred to the SiO2 by the scotch tape. A relatively large flake has been selected for the channel material, as shown in Figure S2 (a) and (d). The thickness of the WSe2 flake has been measured by AFM, which is ~98.5 nm for Dev.1 and ~42.3 nm for Dev.2. Photolithography has been performed to define the channel geometry, followed by 25 sccm vapour XeF2 with 100 sccm N2 at 1 Torr for 3-5 mins. The thicker flake takes a longer time to be etched away. However, as the etching time increases, the XeF2 vapour can go underneath the photoresist and etching the side of WSe2 protected with photoresist, resulting in the over-etching of the WSe2 flake on the edge (Dev.1, see Figure S2 (b)).
In literature, the edge etching by XeF2 or RIE could induce defects and then result in the p-type doping of the WSe2 flakes 1 . After the XeF2 etching, JLS RIE etching (CHF3/Ar plasma) has been performed to etch ~ 25 nm SiO2 as the label marker. The resulting WSe2 channel widths have been measured to be 2 µm for Dev.1 and 4 µm for Dev.2, as shown in Figure S2 (b) and (d).
After the WSe2 flakes patterning, a second photolithography process has been performed to fabricate the electrode. Negative resist AZ2035 has been patterned, and the area for the electrode has been exposed. E-beam evaporation has been used to deposit 10 nm Ti and 300 nm Al as contact metal. Lastly, the lifting-off of the metal has been achieved by remover NMP1165 at 70 °C for several hours. As shown in Figure   S2 (c) and (f), the resulting WSe2 FET of Dev.1 has been achieved to has a channel length of 3×4 µm (4 electrodes) and a channel width of 2 µm . For Dev.2, the channel length has been achieved to be 8.5 µm (only two electrodes), and the channel width has been measured to be 4 µm. Before integrating ZnO NRs on 2D FETs, Keithley 4200 semiconductor analyzer has been used to characterize the electrical performance of 2D WSe2 FETs.
As for the integration of ZnO NRs on the 2D WSe2 channel, the e-beam evaporated ZnO thin-films (without Ti adhesion layer for Dev.1 and with Ti Dev.2) have been used as the seed layer of ZnO NRs. A simplified method 2 has been performed to integrate ZnO NRs on the WSe2 FET of Dev.1, where the ZnO NRs and ZnO seed layer are contacted directly with the WSe2 channel without a Ti adhesion layer. The omitted deposition of a Ti adhesion layer has been found to result in the absence of the ZnO seed layer on photoresist 2 . The positive photoresist SPR 350 has been used to define the area for seed layer deposition and ZnO NRs growth. The thickness of SPR 350 has been measured to be ~1.5 µm. The designed geometry for Dev.1 is 1.5 µm ×10 µm, while 4 µm × 20 µm for Dev.2. Then e-beam evaporation has been used to deposit 50 nm ZnO for Dev.1 and 10 nm Ti/50 nm ZnO for Dev.2.
After the seed layer deposition, ZnO NRs has been grown hydrothermally at 90 °C for 3 hours, with a precursors concentration at 20 mM. Then, acetone has been used to strip the photoresist. It is worth noting that, for Dev.2, it takes a relatively long time to lift off the ZnO NRs on the photoresist. The resulting ZnO NRs have been characterized by SEM and shown in Figure S3. A cluster of flower-like ZnO NRs array on Dev.1 has been observed, and ZnO NRs have been found to possess a relatively large diameter (~1.3 µm) and long length (~5.9 µm). However, for Dev.2, very small and dense ZnO NRs has been observed, with a diameter of ~60 nm and a length of ~800 nm.  The mechanical force has been applied manually by loading the steel calibration weights on a PP plastic plate (0.18 g). The PP plastic plate has been loaded before the calibration weights. The transfer characteristics before and after the loading of the PP plastic plate have been presented in Figure S4 (b). The loading of the PP plate has been observed to increase the drain-source current from 6 nA to 7.5 nA (Vbgs = -40 V, Vds = 5 V). In addition, if a lower Vds has been applied (1 V), the Ids change has been observed to be more significant (from 1 nA to 3 nA). The large force sensing response of 0.18 g load may indicate that ZnO NRs may have a linear region between 0 g to 1 g, and the loads over 1 g have already been in the saturation region. In addition, the contact charge between ZnO NRs and PP plate could be the other origin of the large Ids change.
After loading the PP plate, the different calibration weights were loaded. In the main content, the Ids change under different loads has been calculated by the Ids under weights minus the Ids when PP plate are already loaded to eliminate the effect of the loading of the PP plate. The manually loading sequence has been set as 2 g, 5 g and 1 g. The transfer curve has been recorded for each weight loading, and the time interval between different loading is about 5 min. The Ids curves (Vbgs= -40V and Vds = 5 V) as a function of different loads have been plotted in Figure S4 (c). The force loading between 1 g loading after 5 g loading is at the same level as the first time 2 g loading, which could indicate the force-sensing hysteresis and suggest that a more stable mechanical structure design and encapsulation may be required in the future.
To investigate the maximum loading limit of Dev.1, the higher weight (over 10 g) has been attempted. However, the device has been observed to be broken; the ZnO-WSe2 has been seen to be peeled from the substrate (see Figure S4 (d)). The reason could be the ZnO NRs' overloading or the shear force between ZnO NRs and PP plastic plate. The maximum loading limit could be increased by the larger ZnO NRs growth area and a smaller ZnO NRs; however, the overall sensitivity could be decreased, as described in the main content (Dev.2).

S3. Light intensity sensing measurement of Dev.1.
During the electrical and force-sensing characterization of the 1D-2D transistor, the different intensity of light has been found to influence the Ids of the transistor. For Dev.1, the light intensity sensing capability has been characterized by the probe station with an adjustable intensity lamp. The wavelength spectrum of the light from the lamp has been measured by a spectrometer, as shown in Figure S5(a). The light applied by the lamp includes two groups of main peaks at the wavelength at 360-510 nm (blue) and 600-700 nm ranges (orange). The light intensity has been measured by a lux meter, and the transfer characteristic of the Dev.1 has been presented in Figure S5 (b). The sensitivity of the devices to light is relatively high, and the maximum Ids change has been found to be ~ 6 nA under the light with the intensity of 931 lux (when the Ids in the dark is ~6 nA, Vds = 5V, Vbgs =-40V). It is believed that the light-sensing ability of the transistor is due to the photoelectric effect of the WSe2 channel 3 . The overall transistor could act as a phototransistor for blue light or orange light. It is worth noting that, after encapsulated with Kapton tape (yellow colour, polyimide), the light-sensing ability of the transistor has been found to be shielded. The fabrication of the supplementary device is similar to Dev.1, which has been presented in Supplementary S1. The resulting structure of the supplementary device can be seen in Figure S6 (a). Vertically aligned ZnO NRs have been observed to grow on the etched WSe2 channel, where ZnO thin-film (no Ti adhesion layer) has been used as the seed layer. After the fabrication, the device has been coated with 1 µm Parylene C as the encapsulation layer on top of ZnO NRs. A force gauge has been used to apply mechanical force on the device, and the overall diagram can be seen in Figure S6 (b). Due to the force sharing by Parylene C in the surrounding of the ZnO NRs, the actual force that can be applied without breaking the device has been found to be larger than 10 N.
The transfer and output characteristics of the supplementary device have been presented in Figure S6 (c) and (d). As can be seen, the overall transistor shows an n-type doped behaviour, with a threshold back-gate voltage of ~-5 V to 5 V. For the force sensing measurement, it can be seen in Figure.S5 (d) that the 10 N force applied on ZnO NRs could decrease the channel current. If the Vbgs is fixed at 10 V (linear region of the transfer curve), the Ids has been observed to decrease up to ~25% by the 10 N mechanical force.
The force-related Ids direction change of the supplementary device agrees with Dev.1 and Dev.2 in the main content. The changing direction of Ids could be dependent on the doping type of the WSe2 channel: for n-type doped WSe2, the applied force on ZnO NRs piezo-gate could decrease the Ids; while p-type doped WSe2 could have an increase Ids when a force is applied on ZnO NRs. Moreover, the supplementary device has different encapsulation and force-sensing setups. By using a thin encapsulation layer (Parylene C) instead of PP(polypropylene) plastic plate, the sensing force can possibly increase from a few mN to a few tens of N.